1. Field of the Invention
This invention relates to data processing systems, and more particularly, to means for continuously checking for failures in error checking logic.
2. Description of the Related Art
In U.S. Pat. No. 4,176,258 of Daniel Jackson, granted on Nov. 27, 1979 and assigned to Intel Corporation, detection of errors is accomplished by a redundancy method known as functional redundancy checking (FRC). In this method, an integrated circuit component is duplicated and output signals from the two identical components are compared in an FRC logic. An error condition is reported if the output signals do not match one another.
U.S. Pat. No. 4,792,955 "Apparatus For On-line Checking and Reconfiguration of Integrated Circuit Chips" by David B. Johnson, et al, granted on Dec. 20, 1988 and assigned to Intel Corporation describes a way of recovering from an error detected by the FRC logic where one of the components is found to be faulty. This is done by splitting the components apart so that the faulty one is disengaged from the system and the operative one continues in use, but without the FRC checking capability.
In these prior circuits, if the FRC logic itself is not working correctly error conditions may go unreported. Because the FRC logic is what the system relies on to correctly identify errors, it is important that the FRC logic itself by tested during normal operation of the system.
It is therefore an object of this invention to provide a redundant module checking system in which the error checking logic continuously performs a check on itself in order to ascertain that it is working correctly.